MD653D、MD652D 高速DAC芯片

MD653D /MD652D 高速DAC芯片立维创展常备现货工程师可放心选择

MD653D /MD652D 高速DAC芯片立维创展常备现货工程师可放心选择如有需要请联系立维创展黄小姐 Description 描述 MD653D is a high-speed 12-bit Digital to Analog Converter (DAC) integrated with a 48:12 (12 channels of 4:1) input multiplexer. The on-chip DAC can be operated at a sampling rate up to 4.5Gsps. The analog outputs of DAC can be selected between Normal-Hold mode (for the 1st Nyquist band ) or Return-to-Zero mode (for the 1st, 2nd and 3rd Nyquist band) operation. The differential digital data input interfaces are LVPECL, LVDS, and CML compatible. After the 48 pairs of differential data inputs were multiplexed up to 4 times of speed, the 12 high speed data bits are latched and encoded to drive DAC output stage. Complementary outputs are available with 50-Ω output back terminations. Divided-by-4 clock outputs and sampling phase selection (SEL1 and SEL2) are provided to ease the alignment of sampling phase md653d是高速的12位数字到模拟转换器（DAC）与48:12集成（4:1 12通道）输入多路复用器。片上DAC可以在采样率高达4.5gsps操作。DAC的模拟输出可以选择正常保持模式之间（第一奈奎斯特频段）或归零方式（为第一、第二和第三的奈奎斯特带）操作。差分输入的数字数据接口的LVPECL、LVDS、CML兼容。在48对差分数据输入多了4倍的速度，12高速数据位锁存和编码驱动DAC输出级。互补输出可与50Ω输出端子。divided-by-4时钟输出和采样相位选择（SEL1和SEL2）提供了方便的采样相位对齐 relative to the input data. Divided-by-8 clock outputs are also provided. A RESET function is provided for system applications which need to synchronize the outputs from ultiple MD653D’s. 相对于输入数据。还提供了除8时钟输出。复位功能提供了系统的应用需要同步输出多种md653d的。 KEY FEATURES 主要特点 • 4:1 multiplexing ratio for each input bit of DAC •4:1复用率为每个输入位的DAC • 12-bit resolution DAC up to 4.5 Gsps rate •12位分辨率达到4.5 GSPS速率 • DAC analog output format can be selected between Normal-Hold (NH) mode or Return-to-Zero •DAC模拟输出格式可以选择之间的正常举行（NH）模式或归零 (RZ) mode （RZ）模式 • Complementary outputs with 50-Ω back terminations •互补输出50Ω回到终端 • Both complementary divide-by-4 and divide-by-8 clock outputs are provided for data •互补分频4和8分频时钟输出提供数据 synchronization 同步 • 2.8 W power consumption 2.8瓦功耗 • Variable 400~800 mVPP single-ended output swing •变量400 ~ 800 mVpp的单端输出摆幅 • On-chip 100 ohm termination between each differential input data and RESET pair 在芯片100欧姆终端之间的每个差分输入数据和复位对 • LQFP package with exposed pad •LQFP封装具有裸露焊盘