LPC2114FBD64 01,15 托盘

3.3 MCPWM.1: MCPWM Abort pin is not functional Introduction: The Motor Control PWM engine is optimized for three-phase AC and DC motor control applications, but can be used in many other applications that need timing, counting, capture, and comparison. The MCPWM contains a global Abort input that can force all of the channels into a passive state and cause an interrupt. Problem: The MCPWM Abort input is not functional. Work-around: The MCPWM Abort function can be emulated in software with the use of a non-maskable interrupt combined with an interrupt handler that shuts down the PWM. This will result in a small delay on the order of 50 main clock cycles or about 1/3 of a microsecond at 150 MHz. Alternatively, the State Configurable Timer (SCT) can be configured to implement MCPWM functionality including an Abort input. The SCT can respond to external inputs in one clock cycle. ES_LPC435X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP B.VAll rights reserved. Errata sheet Rev. 2 — 20 Octoberf 11 NXP Semiconductors ES_LPC435x/3x/2x/1x Errata sheet LPC435x/3x/2x/1x 3.4 PMC.1: PMC.x power management controller fails to wake up from Deep Sleep, Power Down, or Deep Power Down Introduction: The PMC implements the control sequences to enable transitioning between different power modes and controls the power state of each peripheral. In addition, wake-up from any of the power-down modes based on hardware events is supported. Problem: When the chip is in a transition from active to Deep Sleep, Power Down, or Deep Power Down, wakeup events are not captured and they will block further wakeup events from propagating. The time window for this transition is 6 uS and is not affected by the chip clock speed. After a wakeup event is received during the PMC transition, the chip can only recover by using an external hardware reset or by cycling power. Work-around: Make sure that a wakeup signal is not received during the Deep Sleep, Power Down, or Deep Power Down transition period. An example circuit to work around this could include an external 6 uS one shot which could be triggered via software using a GPIO line when entering Deep Sleep, Power Down, or Deep Power Down mode. The one-shot's output could be used to gate the wakeup signal(s) to prevent receiving a wakeup signal during the PMC transition period. Depending on the system design, it may also be needed to latch the wakeup signal(s) so that they will still be present after the one-shot's 6 uS timeout.